Analysis challenge

Sign-off analysis results must match measured power, timing, and sustained temperature of integrated circuits. Lack of correlation between simulated and real life behaviour of integrated circuits causes many problems in design cycle. Increasing number of tools involved in sign-off analysis still provides fragmented picture that is far from measured numbers. InVar is the only tool on the market that implements concurrent analysis of power, temperature, timing, and IR-drop. InVar results correlate with measured parameters of physical samples.

Moore's law still remains valid. Reduction of feature size and increase of transistor's count per area impose a great challenge to EDA tools. To keep the speed of growth, industry needs new tools that are aware of new technology. Some effects that used to be “second order” become critical. In particular, designer cannot ignore any more the dependency between power, timing, and temperature. Analysis in fixed operating corners loses correlation as technology moves forward.

Temperature variation effects

  • Electromigration causes exponential lifetime degradation
  • Leakage power increases exponentially
  • Delay degrades with temperature
  • Signal/power integrity issues grow as temperature grows
  • Temperature gradient causes mechanical stress
  • Extraction, timing, and power analysis should take into account temperature variation
  • Exponential increase of analysis corners causes exponential increase of analysis run-time
Temperature variation effects
 
Voltage drop effect

Voltage drop effect

  • Voltage drop ( IR-drop ) affects timing and power
  • Supply rail self heating effects are often overlooked